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High Throughput Add (Clock-Driven Logic)

Last Modified: May 15, 2017

Computes the sum of two specified values (x and y).

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x

First addend.

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y

Second addend.

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x+y

Sum of x and y.

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operation overflow

A Boolean that indicates whether the theoretical computed value exceeds the valid range of the output data type.

TRUE The theoretical computed value exceeds the valid range of the output data type.
FALSE The theoretical computed value does not exceed the valid range of the output data type.

Where This Node Can Run:

Desktop OS: none

FPGA: All devices


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