Table Of Contents

DSP48E (Clock-Driven Logic)

Last Modified: September 10, 2016

Represents a DSP48E slice on a supported FPGA target. You can use the this function on Xilinx Virtex-5, Virtex-6, and Virtex-7 FPGA targets.

spd-note-note
Note  

This help file is not intended to be a comprehensive discussion of DSP48E slices. Before using this function, National Instruments recommends you become familiar with the Virtex-5 FPGA XtremeDSP Design Considerations User Guide. This guide is available on the Xilinx Web site at www.xilinx.com and contains detailed information about the slice, including architectural details, timing considerations, descriptions of input and output ports, and sample applications that help you program the slice effectively.

connector_pane_image
datatype_icon

a

The inputs and outputs for this node have many possible configurations.

spd-note-note
Note  

This help file is not intended to be a comprehensive discussion of DSP48E slices. Before using this function, National Instruments recommends you become familiar with the Virtex-5 FPGA XtremeDSP Design Considerations User Guide. This guide is available on the Xilinx Web site at www.xilinx.com and contains detailed information about the slice, including architectural details, timing considerations, descriptions of input and output ports, and sample applications that help you program the slice effectively.

datatype_icon

b

The inputs and outputs for this node have many possible configurations.

spd-note-note
Note  

This help file is not intended to be a comprehensive discussion of DSP48E slices. Before using this function, National Instruments recommends you become familiar with the Virtex-5 FPGA XtremeDSP Design Considerations User Guide. This guide is available on the Xilinx Web site at www.xilinx.com and contains detailed information about the slice, including architectural details, timing considerations, descriptions of input and output ports, and sample applications that help you program the slice effectively.

datatype_icon

c

The inputs and outputs for this node have many possible configurations.

spd-note-note
Note  

This help file is not intended to be a comprehensive discussion of DSP48E slices. Before using this function, National Instruments recommends you become familiar with the Virtex-5 FPGA XtremeDSP Design Considerations User Guide. This guide is available on the Xilinx Web site at www.xilinx.com and contains detailed information about the slice, including architectural details, timing considerations, descriptions of input and output ports, and sample applications that help you program the slice effectively.

datatype_icon

p

The inputs and outputs for this node have many possible configurations.

spd-note-note
Note  

This help file is not intended to be a comprehensive discussion of DSP48E slices. Before using this function, National Instruments recommends you become familiar with the Virtex-5 FPGA XtremeDSP Design Considerations User Guide. This guide is available on the Xilinx Web site at www.xilinx.com and contains detailed information about the slice, including architectural details, timing considerations, descriptions of input and output ports, and sample applications that help you program the slice effectively.

Where This Node Can Run:

Desktop OS: none

FPGA: All devices


Recently Viewed Topics