Version:

Last Modified: September 10, 2016

Computes the dot product of two vectors of real or complex numbers.
If you configure **Vector Size** as 1, you must provide scalar values. For any other **Vector Size**, this node supports scalar values or 1D fixed-size arrays of that size.

Input values. You can pass scalar values point-by-point or pass all values at once in a fixed-size array. **x** and **y** must be both scalar or both 1D fixed-size arrays. If you configure **Vector Size** as 1, you must provide scalar values.

A Boolean that describes whether the next data point has arrived for processing. Wire the **output valid** output of an upstream node to this input to transfer data from the upstream node to this node.

TRUE | The next data point has arrived for processing. |

FALSE | The next data point has not arrived for processing. |

A Boolean that defines whether downstream nodes are ready for this node to return a new value. Use a Feedback Node to wire the **ready for input** output of a downstream node to this input of the current node.

True | Downstream nodes are ready for this node to return a new value. |

False | Downstream nodes are not ready for this node to return a new value. |

**Default: **True

The dot product of **x** and **y**.

A Boolean that indicates whether the output data type can express all values of the result. This node applies overflow and rounding options according to your configuration of the output.

True | The output data type cannot express all values of the result. |

False | The output data type can express all values of the result. |

A Boolean that indicates whether this node has computed a result that downstream nodes can use. Wire this output to the **input valid** input of a downstream node to transfer data from the node to the downstream node.

True | The node has computed a result that downstream nodes can use. |

False | This node has not computed a result that downstream nodes can use. Any data output returns an undefined value. The undefined value returned by a data output may differ between simulation and hardware. |

**x** and **y** must be both scalar or both 1D fixed-size array. If the interface types differ, **x** takes precedent. If both interface types are 1D fixed-size arrays, but the array sizes differ, the input with the smaller array size takes precedent. If the input with precedence is a 1D fixed-size array, LabVIEW dims **Vector Size** configuration option for the node and uses the array size from the wire.

You can improve the timing performance of this node on an FPGA target by adjusting the number of pipelining stages.In general, increasing the number of pipelining stages also increases the maximum clock rate this node can achieve. However, the actual clock rate depends on many considerations, including the following factors:

**Where This Node Can Run: **

Desktop OS: none

FPGA: All devices