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Discrete Fourier Transform (Clock-Driven Logic)

Last Modified: September 10, 2016

Performs a discrete Fourier transform as defined by the LTE standard, in terms of point sizes, low latency, and resource requirements.

In the Item tab, click Configure Xilinx IP to configure inputs and outputs for this node.

Need License: No


Where This Node Can Run:

Desktop OS: none

FPGA: All devices

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