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NI USRP-2944R Block Diagram

Version:
    Last Modified: May 17, 2017

    The following figure shows a simple block diagram of the NI USRP-2944R.

    Figure 1. NI USRP-2944R Block Diagram
    spd-note-note
    Note  

    The area within the dotted line indicates the processing on the FPGA when you use NI-USRP with the default FPGA image. When you use LabVIEW FPGA, you control the processing on the FPGA.

    spd-note-note
    Note  

    The RF switch allows transmit and receive operations to occur on the same shared antenna. On the NI USRP-2944R, one antenna is designated receive-only.

    The following lists describe the individual blocks:

    Receive path:

    • Either a low-noise amplifier (LNA) or an LNA low-pass filter (LPF) combination amplifies the incoming signal, depending on the incoming frequency.
    • The signal travels through either a direct conversion path or an up conversion path, depending on the frequency.
    • A final driver amplifier amplifies the signal.
    • The phase-locked loop (PLL) controls the voltage-controlled oscillator (VCO) so that the device clocks and local oscillators (LO) can be frequency-locked to a reference signal.
    • The mixer downconverts the signals to the baseband in-phase (I) and quadrature (Q) components.
    • The lowpass filter reduces noise and high frequency components in the signal.
    • The analog-to-digital converter (ADC) digitizes the I and Q data.
    • The digital downconverter (DDC) mixes, filters, and decimates the signal to a user-specified rate.
    • The downconverted samples are transported to the host computer over a standard PCIe connection.

    Transmit path:

    • The host computer synthesizes baseband I/Q signals and transmits the signals to the device over a standard PCIe connection.
    • The digital upconverter (DUC) mixes, filters, and interpolates the signal to 400 MS/s.
    • The digital-to-analog converter (DAC) converts the signal to analog.
    • The lowpass filter reduces noise and high frequency components in the signal.
    • The mixer upconverts the signals to a user-specified RF frequency.
    • The PLL controls the VCO so that the device clocks and LO can be frequency-locked to a reference signal.
    • The signal travels through either a direct conversion path or a down conversion path, depending on the frequency.
    • The transmit amplifier amplifies the signal and transmits the signal through the antenna.

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