Begins DMA data transfer between the FPGA target and the host computer.
Reference to an FPGA VI
Error conditions that occur before this node runs.
The node responds to this input according to standard error behavior.
Default: no error
Reference to an FPGA VI.
The node produces this output according to standard error behavior.
Installed By: LabVIEW Communications System Design Suite (introduced in 1.0)
Where This Node Can Run:
Desktop OS: Windows
FPGA: Not supported