Determines whether the input value falls within a range specified by the upper and lower limits and optionally coerces the value to fall within the range.
The node performs the coercion only in Compare Elements mode.
upper limit
The upper limit of the range.
Data Type Changes on FPGA
When you use this node on the FPGA or simulated FPGA, the data type for this input changes to a signed integer.
This change allows LabVIEW to know the size of the input at compile time.
x
The value to test in the range and optionally coerce if it does not fall between the upper and lower limits.
Data Type Changes on FPGA
When you use this node on the FPGA or simulated FPGA, the data type for this output changes to a signed integer.
This change allows LabVIEW to know the size of the output at compile time.
lower limit
The lower limit of the range.
Data Type Changes on FPGA
When you use this node on the FPGA or simulated FPGA, the data type for this input changes to a signed integer.
This change allows LabVIEW to know the size of the input at compile time.
in range?
A Boolean indicating whether the input value is in range.
| TRUE |
x is in range. |
| FALSE |
x is out of range. This node also returns FALSE if x, upper limit, or lower limit is NaN. |
In Compare Elements mode, the data type structure of in range? matches the data type structure of x, with each scalar replaced by a Boolean value.
coerced
The coerced or unchanged input value.
Data Type Changes on FPGA
When you use this node on the FPGA or simulated FPGA, the data type for this output changes to a signed integer.
This change allows LabVIEW to know the size of the output at compile time.
Installed By: LabVIEW Communications System Design Suite (introduced in 1.0)
Where This Node Can Run:
Desktop OS: Windows
FPGA: All devices
