Use static array indexing so the compiler can make optimizations to your code and get the best performance possible for your FPGA IP design.
There are two methods you can use to index an array:
The following image shows an example of dynamic array indexing. In the example, the FPGA IP VI offsets the index by 0 when the even call control is True and by 6 when the control is False. Because the compiler cannot determine the value of the control at compile time, it makes only limited optimizations. As a result, the throughput of the FPGA IP VI suffers.
By identifying recurring patterns in the code, you can make the control value static at compile time and improve the performance of the code. If you assume the control is True on even calls and False on odd calls, you can rewrite the code as shown in the following image.
In the rewritten code, the compiler determines the value for the array indexing logic at compile time. It makes more optimizations, and the throughput of the FPGA IP VI is higher.