FPGA resources are limited, so your algorithm may not fit on the FPGA. When you finish creating an FPGA IP algorithm, you can estimate the FPGA resources the algorithm requires. One benefit of using FPGA IP is that estimating these resources does not require compilation, thereby saving you time in your design process.
When you estimate FPGA resources, LabVIEW also reports the latency and initiation interval your algorithm can achieve given a requested clock rate and throughput. These metrics help you understand how your algorithm performs on the FPGA.