Sets the depth, in elements, of the host memory part of the Host to Target DMA FIFO used to transfer instructions from a host node to a corresponding FPGA node.
When Open Session is called, it sets the depth of the instruction FIFO to a reasonable value and stores that value within the session. When this node is called, the FIFO is configured to the new instruction fifo depth and this value is stored in the session. Use this node only in applications where the default setting is not sufficient.
session in—Identifies your session. Obtain session in from Register Bus Open Session.
instruction fifo depth—Specifies the depth, in elements, of the host memory part of the Host to Target DMA FIFO used to transfer instructions from this host node to the corresponding FPGA node.
error in—Describes error conditions that occur before this node runs. This input provides standard error in functionality.
session out—Passes a reference to your session to the next node.
error out—Contains error information. This output provides standard error out functionality.
Installed By: LabVIEW Communications System Design Suite (introduced in 1.0)
Where This Node Can Run:
Desktop OS: Windows
FPGA: Not supported