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Opens a session to a host VI that can communicate with a corresponding node on the FPGA VI specified by the fpga ref parameter. Use the session out parameter, which this node returns, to identify the Register Bus object in all subsequent Register Bus Host nodes.

Note  

You can use a maximum of eight instances with bus instance numbers [0-7].

Input Parameters

  • fpga ref—Specifies a reference to an FPGA VI. Use Open FPGA VI Reference on the FPGA Interface Nodes and Functions palette to open a reference to the FPGA node, and wire the FPGA node Reference Out parameter from that function to this input.
  • bus instance—Specifies the instance of the Register Bus object.
    Note  

    You can use a maximum of eight instances with bus instance numbers [0-7].

  • error in—Describes error conditions that occur before this node runs. This input provides standard error in functionality.

Output Parameters

  • session out—Passes a reference to your session to the next node.
  • error out—Contains error information. This output provides standard error out functionality.
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Installed By: LabVIEW Communications System Design Suite (introduced in 1.0)

Where This Node Can Run:

Desktop OS: Windows

FPGA: Not supported