Returns the depth, in elements, of the host memory part of the Host to Target DMA FIFO that transfers instructions from this instance of the Register Bus Host node to the corresponding FPGA node. You can set the depth of the instruction FIFO using the Set Instruction FIFO Depth node of this library.
session in—Identifies your session. Obtain session in from the Register Bus Open Session.
error in—Describes error conditions that occur before this node runs. This input provides standard error in functionality. This node runs normally even if an error occurred before this node runs.
session out—Passes a reference to your session to the next node.
instruction fifo depth—Returns the depth, in elements, of the host memory part of the Host to Target DMA FIFO used to transfer instructions from this Register Bus Host node to the corresponding node on the FPGA.
error out—Contains error information. This output provides standard error out functionality.
Installed By: LabVIEW Communications System Design Suite (introduced in 1.0)
Where This Node Can Run:
Desktop OS: Windows
FPGA: Not supported