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Writes an element to an FPGA FIFO.

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reference in

A reference to a FIFO.

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data

The data element you would like to write to the FIFO. This data may be lost if the FIFO is full. Use ready for input or full threshold met? to determine if data may safely be written to the FIFO.

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input valid

A Boolean that determines whether the next data point has arrived for processing. This input is generally wired to the output valid output of an upstream node.

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reference out

A reference to a FIFO.

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ready for input

A Boolean that returns TRUE if this node is ready to accept new input data. Use a Feedback Node to wire this output to the ready for output input of an upstream node.

Default: TRUE