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Provides a general purpose video timing generator and detector.The controller provides automatic detection of horizontal and vertical front and back porches, sync pulses, and active video pixels along with sync and blank pulse polarity detection. The controller generates horizontal and vertical blanking and sync pulses, including support for programmable pulse polarity. You can program the core through a comprehensive register set, which allows you to control various timing generation parameters, including horizontal and vertical front and back porch start, active video start, sync start, and more. A comprehensive set of interrupt status bits is provided for processor monitoring.

Need License: Yes

Interface: AXI4-Lite

connector_pane_image

Installed By: LabVIEW Communications System Design Suite (introduced in 1.0)

Where This Node Can Run:

Desktop OS: none

FPGA: All devices