The System Timing Slot is slot 10. The system timing slot accepts the following peripheral modules:
The system timing slot has three dedicated differential pairs (PXIe_DSTAR) connected from the TP1 and TP2 connectors to the XP3 connector for each PXI Express peripheral or hybrid peripheral slot, as well as routed back to the XP3 connector of the system timing slot, as shown in the following figure. You can use the PXIe_DSTAR pairs for high-speed triggering, synchronization, and clocking. Refer to the PXI Express Specification for details. The system timing slot also has a single-ended (PXI Star) trigger connected to every slot. Refer to the following figure for more details.
The system timing slot has a pin (PXI_CLK10_IN) through which a system timing module may source a 10 MHz clock to which the backplane phase-locks.
The system timing slot has a pin (PXIe_SYNC_CTRL) through which a system timing module can control the PXIe_SYNC100 timing.