Table Of Contents

Clocking

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    Last Modified: May 10, 2017

    The NI-5771 clock source controls the sample rate and other timing functions on the device. The following table contains information about the possible NI-5771 clock sources.

    Table 1. NI-5771 Clock Sources
    Clock Frequency[1] Description
    Internal Clock Locked to Internal Reference 1.5 GHz The internal reference is free-running.
    Internal Clock PLL On[2] (IoModSyncClock) 1.5 GHz The internal reference locks to PXI_CLK10 through IoModSyncClock, which is provided only through the backplane of PXIe-796x devices.
    Internal Clock PLL On (REF IN) 1.5 GHz The internal reference locks to an external Reference Clock (10 MHz), which is provided through the REF IN front panel connector.
    External Clock (CLK IN) [3] 850 MHz to 1.5 GHz An external Sample Clock can be provided through the CLK IN front panel connector.
    • 1 You can use TIS to acquire data at rates up to 3 GS/s. To configure your device for TIS, set the User Command signal in the NI-5771 CLIP to 4, set the User Data 0 signal to 1, and set the User Data 1 signal to either 0 or 1, depending on which AI channel you want to sample.
    • 2 PLL settling time is 6 s.
    • 3 Do not connect an external Sample Clock with a frequency greater than 1.5 GHz to the CLK IN front panel connector to acquire data at rates greater than 1.5 GS/s. Instead, use an external clock with a frequency between 850 MHz and 1.5 GHz and configure the CLIP to use TIS mode.

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