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Wait Until Next Multiple (Microseconds) (G Dataflow)

    Last Modified: December 12, 2016

    Causes the diagram or subdiagram to wait until the value of the operating system's microsecond timer becomes a multiple of the specified microsecond multiple before completing execution. Use this node inside a loop to control the execution rate of the loop. You can also use this node to synchronize activities between two different sections of code (such as between two loops).

    Programming Patterns

    microsecond multiple

    The number that microsecond timer value must be a multiple of. Wiring a value of 0 to this parameter forces the current thread to yield control of the CPU.


    microsecond timer value

    Value of the operating system's microsecond timer after the wait.

    Behavior of Wait Until Next Multiple for the First Iteration of a Loop

    When using Wait Until Next Multiple inside a loop, the first loop iteration may be shorter than subsequent iterations. This is because the amount of time the first loop iteration waits depends on the value of the system clock when the loop begins executing. For example, consider a loop that contains a Wait Until Next Multiple (Milliseconds) node with 10 ms wired to millisecond multiple. This loop begins to execute when the value of the system clock is 112 ms. The first loop iteration lasts until the value of the system clock is 120 ms (a multiple of 10), which means that the iteration only lasts 8 ms. The loop then begins the second iteration, and each subsequent loop iteration begins every 10 ms.

    Effect of the microsecond multiple input on Loop Execution Time

    When specifying a value for the input of Wait Until Next Multiple, ensure that the value is greater than the time required to execute the code inside the loop. If a loop contains code that takes longer to execute than the time specified, Wait Until Next Multiple has no effect on the execution speed of the loop.

    Where This Node Can Run:

    Desktop OS: Windows

    FPGA: DAQExpress does not support FPGA devices

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