Table Of Contents

Build Array (G Dataflow)

Last Modified: September 13, 2017

Concatenates multiple arrays or appends elements to an n-dimensional array.

This node constructs the new array differently depending on the dimensionality of the inputs and whether the Concatenate Inputs option is enabled in the Item tab. The following table shows the behavior for Build Array for various inputs and configurations.

Inputs Concatenate Inputs Option Behavior Dimensionality of Output
Arrays of the same dimension Concatenate Inputs disabled n+1
Arrays of the same dimension Concatenate Inputs enabled n
An array and a scalar of different dimensions Concatenate Inputs enabled n
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element

Any n-dimensional array or scalar element. All inputs must be the same base type.

Behavior with Empty Array Inputs

If element is an empty array, this node produces an output array of dimension n+1 if the Concatenate Inputs option is not selected. If the Concatenate Inputs option is selected, this node produces an output array of the same dimension as the empty element array.

Different Sized Input Arrays

This node displays the following behavior when inputs of the same dimension contain a different number of elements:

  • By default, this node pads the smallest input to match the size of the largest input. For example, if element is {1, 2} and element 2 is {3, 4, 5}, Build Array pads element with a trailing 0 and returns {{1, 2, 0}, {3, 4, 5}}.
  • If the Concatenate Inputs option is enabled, this node does not pad inputs. For example, if element is {1, 2} and element 2 is {3, 4, 5}, Build array returns {1, 2, 3, 4, 5} without padding.

Data Type Changes on FPGA

When you add this node to a document targeted to an FPGA, this input has a default data type that uses fewer hardware resources at compile time.

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appended array

The resulting array.

Data Type Changes on FPGA

When you add this node to a document targeted to an FPGA, this output has a default data type that uses fewer hardware resources at compile time.

Concatenating Elements

When all element inputs have the same dimension, you can select the Concatenate Inputs option in the Item tab to append all inputs in order, forming an output array of the same dimensionality as the array input wired. This option is not available for scalars. If element inputs have different dimensions, Concatenate Inputs is enabled automatically and cannot be disabled.

Building Multidimensional Arrays

By default, if all element inputs have the same dimension, Build Array appends inputs to an array one dimension higher than that of the scalar element or array element inputs. Each input constitutes a member of the nth dimension of the output array. For example, 1D array inputs become rows of the 2D array output.
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Note  

Build Array does not increase the dimension of the output array if the Concatenate Inputs option is enabled.

The following table demonstrates how Build Array appends inputs by default and with the Concatenate Inputs option enabled.
Inputs Build Array Default Concatenate Inputs Comments
{1, 2} {3, 4} {{1, 2}, {3, 4}} {1, 2, 3, 4} Because both input arrays are of the same dimension, you can choose which configuration option to use.
{1, 2} {3, 4, 5} {{1, 2, 0}, {3, 4, 5}} {1, 2, 3, 4, 5} Because both input arrays are of the same dimension, you can choose which configuration option to use. By default, this node appends an extra 0 of padding to the first input array in order to make it the same length as the second input. No padding appears for the Concatenate Inputs option.
{1, 2} 3 N/A {1, 2, 3} If the inputs are of different dimensions, Concatenate Inputs is enabled automatically and cannot be disabled. appended array returns the input elements in order, regardless of which has the highest dimension.
3 {1, 2} N/A {3, 1, 2} If the inputs are of different dimensions, Concatenate Inputs is enabled automatically and cannot be disabled. appended array returns the input elements in order, regardless of which has the highest dimension.

Where This Node Can Run:

Desktop OS: Windows

FPGA: DAQExpress does not support FPGA devices

Web Server: Supported in VIs that run in a web application


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