Last Modified: March 31, 2017

Resamples a signal according to specific delay and sampling interval.

A Boolean that specifies the initialization of the internal state of the node.

True | Initializes the internal state to zero. |

False | Initializes the internal state to the final state from the previous call of this node. |

This node automatically initializes the internal state to zero on the first call and runs continuously until this input is True.

**Default: **False

Sampling interval, in seconds, between data points in the resampled signal.

**Default: **1

Start time value for the resampled signal.

This input is available only if you wire a waveform or an array of waveforms to **signal**.

Timestamp for resampled signal.

This input is available only if you wire one of the following data types to **signal**:

- 1D array of double-precision, floating-point numbers
- 2D array of double-precision, floating-point numbers
- 1D array of complex double-precision, floating-point numbers
- 2D array of complex double-precision, floating-point numbers

**Default: **0

Algorithm this node uses to resample the input signal.

Name | Value | Description |
---|---|---|

coerce | 0 | This node sets each output sample value to the input sample value that is closest to it in time. |

linear | 1 | This node sets each output sample value to the linear interpolation between the two input samples that are closest to it in time. |

spline | 2 | This node uses the spline interpolation algorithm to compute the resampled values. |

FIR filter | 3 | This node uses a finite impulse response (FIR) filtering algorithm to compute the resampled values. |

**Default: **FIR filter

Error conditions that occur before this node runs.

The node responds to this input according to standard error behavior.

Standard Error Behavior

Many nodes provide an **error in** input and an **error out** output so that the node can respond to and communicate errors that occur while code is running. The value of **error in** specifies whether an error occurred before the node runs. Most nodes respond to values of **error in** in a standard, predictable way.

**Default: **No error

Minimum values this node needs to define the FIR filter.

This input is valid only when you set **interpolation mode** to FIR filter.

Minimum attenuation level of signal components aliased after any resampling operation.

If **alias rejection (dB)** is less than 48, this node uses 48 instead.

**Default: **120

Fraction of the new sampling rate that is not attenuated.

**Default: **0.4536

A Boolean that determines whether the input signal undergoes lowpass filtering when this node downsamples the signal.

True | This node protects the resampled signal from aliasing. The computation requirements increase during resampling. |

False | The input signal undergoes lowpass filtering when this node downsamples the signal. |

**Default: **True

Actual start time of the resampled signal.

This output is available only if you wire a waveform or an array of waveforms to **signal**.

Start time of the next resampled signal.

This output is available only if you wire a waveform or an array of waveforms to **signal**.

Error information.

The node produces this output according to standard error behavior.

Standard Error Behavior

**error in** input and an **error out** output so that the node can respond to and communicate errors that occur while code is running. The value of **error in** specifies whether an error occurred before the node runs. Most nodes respond to values of **error in** in a standard, predictable way.

A Boolean that indicates whether the actual start time of the resampled signal equals the start time value you specified.

True | The actual start time of the resampled signal does not equal the start time value you specified. |

False | The actual start time of the resampled signal equals the start time value you specified. |

This output is available only if you wire a waveform or an array of waveforms to **signal**.

**Where This Node Can Run: **

Desktop OS: Windows

FPGA: DAQExpress does not support FPGA devices