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Sample Clocked Buffered Pulse-Width Measurement

    Last Modified: February 26, 2018

    A sample clocked buffered pulse-width measurement is similar to single pulse-width measurement, but buffered pulse-width measurement takes measurements over multiple pulses correlated to a sample clock.

    The counter counts the number of edges on the Source input while the Gate input remains active. On each sample clock edge, the counter stores the count in the FIFO of the last pulse width to complete. The sampled values will be transferred to host memory using a high-speed data stream.

    The following figure shows an example of a sample clocked buffered pulse-width measurement.

    Figure 1. Sample Clocked Buffered Pulse-Width Measurement

    If a pulse does not occur between sample clocks, an overrun error occurs.

    For information about connecting counter signals, refer to the Default Counter/Timer Routing section.

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