Table Of Contents

Read FIFO (Read U32 FIFO) (Clock-Driven Logic)

Version:
    Last Modified: August 4, 2018

    Reads data from a 32-bit FIFO. This node is a wrapper around the LabVIEW FPGA FIFO Read method and exposes handshaking signals to control when data is read from the FIFO.

    connector_pane_image
    datatype_icon

    fifo

    Reference to a FIFO.

    datatype_icon

    ready for output

    Boolean value that specifies whether the consumer of the data read from the FIFO is ready to accept new data.

    True Indicates the consumer is ready to accept new data and this node is allowed to read data from the FIFO.
    False Prevents this node from returning new data.
    datatype_icon

    output data

    Data read from the FIFO.

    datatype_icon

    output valid

    Boolean value that indicates whether the data read from the FIFO is valid during the current clock cycle.

    Where This Node Can Run:

    Desktop OS: none

    FPGA: Supported

    Web Server: Not supported in VIs that run in a web application


    Recently Viewed Topics